A New Architecture of the Phase Frequency Detector with Improved Gain and Minimal Blind Zone for Fast Settling PLLs

H. K. Ravi, Shashank Tiwari, Jayanta Mukherjee 0002. A New Architecture of the Phase Frequency Detector with Improved Gain and Minimal Blind Zone for Fast Settling PLLs. In IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020. pages 1-5, IEEE, 2020. [doi]

@inproceedings{RaviT020,
  title = {A New Architecture of the Phase Frequency Detector with Improved Gain and Minimal Blind Zone for Fast Settling PLLs},
  author = {H. K. Ravi and Shashank Tiwari and Jayanta Mukherjee 0002},
  year = {2020},
  doi = {10.1109/ISCAS45731.2020.9180558},
  url = {https://doi.org/10.1109/ISCAS45731.2020.9180558},
  researchr = {https://researchr.org/publication/RaviT020},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-3320-1},
}