Nivethithaa Ravikumar, Zaniar Hoseini, Kye-Shin Lee, S. I. Hariharan, Yong-Min Lee. An area efficient 10-bit time mode hybrid DAC with current settling error compensation. In IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{RavikumarHLHL15,
title = {An area efficient 10-bit time mode hybrid DAC with current settling error compensation},
author = {Nivethithaa Ravikumar and Zaniar Hoseini and Kye-Shin Lee and S. I. Hariharan and Yong-Min Lee},
year = {2015},
doi = {10.1109/MWSCAS.2015.7282103},
url = {https://doi.org/10.1109/MWSCAS.2015.7282103},
researchr = {https://researchr.org/publication/RavikumarHLHL15},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015},
publisher = {IEEE},
isbn = {978-1-4673-6558-1},
}