Evaluating BIST Architectures for Low Power

C. P. Ravikumar, N. Satya Prasad. Evaluating BIST Architectures for Low Power. In 7th Asian Test Symposium (ATS 98), 2-4 December 1998, Singapore. pages 430-434, IEEE Computer Society, 1998. [doi]

Authors

C. P. Ravikumar

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N. Satya Prasad

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