A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects

J. V. R. Ravindra, M. B. Srinivas. A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects. In Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany. pages 325-330, IEEE, 2007. [doi]

@inproceedings{RavindraS07,
  title = {A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects},
  author = {J. V. R. Ravindra and M. B. Srinivas},
  year = {2007},
  doi = {10.1109/DSD.2007.4341488},
  url = {http://dx.doi.org/10.1109/DSD.2007.4341488},
  tags = {process modeling},
  researchr = {https://researchr.org/publication/RavindraS07},
  cites = {0},
  citedby = {0},
  pages = {325-330},
  booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany},
  publisher = {IEEE},
}