Security evaluation of dual rail logic against DPA attacks

Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin. Security evaluation of dual rail logic against DPA attacks. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 181-186, IEEE, 2006. [doi]

@inproceedings{RazafindraibeMRR06,
  title = {Security evaluation of dual rail logic against DPA attacks},
  author = {Alin Razafindraibe and Philippe Maurine and Michel Robert and Marc Renaudin},
  year = {2006},
  doi = {10.1109/VLSISOC.2006.313230},
  url = {http://dx.doi.org/10.1109/VLSISOC.2006.313230},
  tags = {security, logic},
  researchr = {https://researchr.org/publication/RazafindraibeMRR06},
  cites = {0},
  citedby = {0},
  pages = {181-186},
  booktitle = {IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006},
  publisher = {IEEE},
}