Alin Razafindraibe, Michel Robert, Philippe Maurine. Improvement of dual rail logic as a countermeasure against DPA. In IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007. pages 270-275, IEEE, 2007. [doi]
@inproceedings{RazafindraibeRM07,
title = {Improvement of dual rail logic as a countermeasure against DPA},
author = {Alin Razafindraibe and Michel Robert and Philippe Maurine},
year = {2007},
doi = {10.1109/VLSISOC.2007.4402510},
url = {http://dx.doi.org/10.1109/VLSISOC.2007.4402510},
tags = {logic},
researchr = {https://researchr.org/publication/RazafindraibeRM07},
cites = {0},
citedby = {0},
pages = {270-275},
booktitle = {IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007},
publisher = {IEEE},
}