Alin Razafindraibe, Michel Robert, Philippe Maurine. Improvement of dual rail logic as a countermeasure against DPA. In IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007. pages 270-275, IEEE, 2007. [doi]
Abstract is missing.