Rosario M. Reas, Anastacia B. Alvarez, Joy Alinda P. Reyes. Simulation of Standard Benchmarks in Hardware Implementations of L2 Cache Models in Verilog HDL. In David Al-Dabass, Alessandra Orsoni, Richard Cant, Ajith Abraham, editors, Proceedings of the 12th UKSim, International Conference on Computer Modelling and Simulation, Cambridge, UK, 24-26 March 2010. pages 153-158, IEEE, 2010. [doi]
@inproceedings{ReasAR10, title = {Simulation of Standard Benchmarks in Hardware Implementations of L2 Cache Models in Verilog HDL}, author = {Rosario M. Reas and Anastacia B. Alvarez and Joy Alinda P. Reyes}, year = {2010}, doi = {10.1109/UKSIM.2010.35}, url = {http://dx.doi.org/10.1109/UKSIM.2010.35}, researchr = {https://researchr.org/publication/ReasAR10}, cites = {0}, citedby = {0}, pages = {153-158}, booktitle = {Proceedings of the 12th UKSim, International Conference on Computer Modelling and Simulation, Cambridge, UK, 24-26 March 2010}, editor = {David Al-Dabass and Alessandra Orsoni and Richard Cant and Ajith Abraham}, publisher = {IEEE}, }