A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs - researchr publication authors

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E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Vijaykrishnan Narayanan. A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs. In Oliver Diessel, John Williams, editors, Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, Brisbane, Australia, December 6-8, 2004. pages 121-128, IEEE, 2004. [doi]

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