Performance constrained multi-application network on chip core mapping

B. Naresh Kumar Reddy, Dharavath Kishan, B. Veena Vani. Performance constrained multi-application network on chip core mapping. I. J. Speech Technology, 22(4):927-936, 2019. [doi]

@article{ReddyKV19,
  title = {Performance constrained multi-application network on chip core mapping},
  author = {B. Naresh Kumar Reddy and Dharavath Kishan and B. Veena Vani},
  year = {2019},
  doi = {10.1007/s10772-019-09636-3},
  url = {https://doi.org/10.1007/s10772-019-09636-3},
  researchr = {https://researchr.org/publication/ReddyKV19},
  cites = {0},
  citedby = {0},
  journal = {I. J. Speech Technology},
  volume = {22},
  number = {4},
  pages = {927-936},
}