M. Mahendra Reddy, Sounak Roy. Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC. In Anirban Sengupta, Sudeb Dasgupta, Virendra Singh, Rohit Sharma, Santosh Kumar Vishvakarma, editors, VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers. Volume 1066 of Communications in Computer and Information Science, pages 141-149, Springer, 2019. [doi]
@inproceedings{ReddyR19-3, title = {Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC}, author = {M. Mahendra Reddy and Sounak Roy}, year = {2019}, doi = {10.1007/978-981-32-9767-8_12}, url = {https://doi.org/10.1007/978-981-32-9767-8_12}, researchr = {https://researchr.org/publication/ReddyR19-3}, cites = {0}, citedby = {0}, pages = {141-149}, booktitle = {VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers}, editor = {Anirban Sengupta and Sudeb Dasgupta and Virendra Singh and Rohit Sharma and Santosh Kumar Vishvakarma}, volume = {1066}, series = {Communications in Computer and Information Science}, publisher = {Springer}, isbn = {978-981-32-9767-8}, }