Implementation of Low Power 8-Bit Multiplier Using Gate Diffusion Input Logic - researchr publication authors

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B. N. Manjunatha Reddy, H. N. Sheshagiri, B. R. Vijayakumar, Shanthala S. Implementation of Low Power 8-Bit Multiplier Using Gate Diffusion Input Logic. In Xingang Liu, Didier El Baz, Ching-Hsien Hsu, Kai Kang, Weifeng Chen, editors, 17th IEEE International Conference on Computational Science and Engineering, CSE 2014, Chengdu, China, December 19-21, 2014. pages 1868-1871, IEEE, 2014. [doi]

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