DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs

Pedro Reviriego, Mustafa Demirci, J. Tabero, A. Regadío, Juan Antonio Maestro. DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs. Microelectronics Reliability, 63:314-318, 2016. [doi]

Authors

Pedro Reviriego

This author has not been identified. Look up 'Pedro Reviriego' in Google

Mustafa Demirci

This author has not been identified. Look up 'Mustafa Demirci' in Google

J. Tabero

This author has not been identified. Look up 'J. Tabero' in Google

A. Regadío

This author has not been identified. Look up 'A. Regadío' in Google

Juan Antonio Maestro

This author has not been identified. Look up 'Juan Antonio Maestro' in Google