DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs

Pedro Reviriego, Mustafa Demirci, J. Tabero, A. Regadío, Juan Antonio Maestro. DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs. Microelectronics Reliability, 63:314-318, 2016. [doi]

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