Rosula S. Reyes, Carlos M. Oppus, Jose Claro N. Monje, Noel S. Patron, Raphael A. Gonzales, Jovilyn Therese B. Fajardo. FPGA-Based Digital Signal Processing Trainer. In Mark Burgin, Masud H. Chowdhury, Chan H. Ham, Simone A. Ludwig, Weilian Su, Sumanth Yenduri, editors, CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31 - April 2, 2009, Los Angeles, California, USA, 7 Volumes. pages 343-347, IEEE Computer Society, 2009. [doi]
@inproceedings{ReyesOMPGF09,
title = {FPGA-Based Digital Signal Processing Trainer},
author = {Rosula S. Reyes and Carlos M. Oppus and Jose Claro N. Monje and Noel S. Patron and Raphael A. Gonzales and Jovilyn Therese B. Fajardo},
year = {2009},
doi = {10.1109/CSIE.2009.799},
url = {http://doi.ieeecomputersociety.org/10.1109/CSIE.2009.799},
tags = {rule-based},
researchr = {https://researchr.org/publication/ReyesOMPGF09},
cites = {0},
citedby = {0},
pages = {343-347},
booktitle = {CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31 - April 2, 2009, Los Angeles, California, USA, 7 Volumes},
editor = {Mark Burgin and Masud H. Chowdhury and Chan H. Ham and Simone A. Ludwig and Weilian Su and Sumanth Yenduri},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-3507-4},
}