Efficient Test Circuit to Qualify Logic Cells

Renato P. Ribas, S. Bavaresco, Marcelo Lubaszewski, André Inácio Reis. Efficient Test Circuit to Qualify Logic Cells. In International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. pages 2733-2736, IEEE, 2009. [doi]

@inproceedings{RibasBLR09,
  title = {Efficient Test Circuit to Qualify Logic Cells},
  author = {Renato P. Ribas and S. Bavaresco and Marcelo Lubaszewski and André Inácio Reis},
  year = {2009},
  doi = {10.1109/ISCAS.2009.5118367},
  url = {http://dx.doi.org/10.1109/ISCAS.2009.5118367},
  tags = {testing, logic},
  researchr = {https://researchr.org/publication/RibasBLR09},
  cites = {0},
  citedby = {0},
  pages = {2733-2736},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan},
  publisher = {IEEE},
}