Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis - researchr publication

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Jordi Riera, Lluis Ribas, A. Josep Velasco, Jordi Carrabina. Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis. Journal of Systems Architecture, 43(1-5):119-122, 1997.

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