An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

Marco Rios, William Andrew Simon, Alexandre Levisse, Marina Zapater, David Atienza. An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication. In 27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019. pages 34-39, IEEE, 2019. [doi]

@inproceedings{RiosSLZA19,
  title = {An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication},
  author = {Marco Rios and William Andrew Simon and Alexandre Levisse and Marina Zapater and David Atienza},
  year = {2019},
  doi = {10.1109/VLSI-SoC.2019.8920317},
  url = {https://doi.org/10.1109/VLSI-SoC.2019.8920317},
  researchr = {https://researchr.org/publication/RiosSLZA19},
  cites = {0},
  citedby = {0},
  pages = {34-39},
  booktitle = {27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-3915-9},
}