Jörg Ritter, Paul Molitor. A pipelined architecture for partitioned DWT based lossy image compression using FPGA s. In FPGA. pages 201-206, 2001. [doi]
@inproceedings{RitterM01,
title = {A pipelined architecture for partitioned DWT based lossy image compression using FPGA s},
author = {Jörg Ritter and Paul Molitor},
year = {2001},
doi = {10.1145/360276.360350},
url = {http://doi.acm.org/10.1145/360276.360350},
tags = {architecture, partitioning},
researchr = {https://researchr.org/publication/RitterM01},
cites = {0},
citedby = {0},
pages = {201-206},
booktitle = {FPGA},
}