A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grøstl

Marcin Rogawski, Kris Gaj. A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grøstl. In 15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012. pages 568-575, IEEE, 2012. [doi]

@inproceedings{RogawskiG12,
  title = {A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grøstl},
  author = {Marcin Rogawski and Kris Gaj},
  year = {2012},
  doi = {10.1109/DSD.2012.8},
  url = {http://dx.doi.org/10.1109/DSD.2012.8},
  researchr = {https://researchr.org/publication/RogawskiG12},
  cites = {0},
  citedby = {0},
  pages = {568-575},
  booktitle = {15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2498-4},
}