Modular vector processor architecture targeting at data-level parallelism

Seyed A. Rooholamin, Sotirios G. Ziavras. Modular vector processor architecture targeting at data-level parallelism. Microprocessors and Microsystems, 39(4-5):237-249, 2015. [doi]

@article{RooholaminZ15,
  title = {Modular vector processor architecture targeting at data-level parallelism},
  author = {Seyed A. Rooholamin and Sotirios G. Ziavras},
  year = {2015},
  doi = {10.1016/j.micpro.2015.04.007},
  url = {http://dx.doi.org/10.1016/j.micpro.2015.04.007},
  researchr = {https://researchr.org/publication/RooholaminZ15},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {39},
  number = {4-5},
  pages = {237-249},
}