A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS - researchr publication authors

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Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan, Ankur Kumar, Hae-Woong Yang, Lee Sledjeski, John Hamilton, Soumya Chandramouli, Arlo Aude, Samuel Palermo. A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS. J. Solid-State Circuits, 54(3):672-684, 2019. [doi]

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