Abinash Roy, Masud H. Chowdhury. Global Interconnect Optimization in the Presence of On-chip Inductance. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 885-888, IEEE, 2007. [doi]
@inproceedings{RoyC07:0,
title = {Global Interconnect Optimization in the Presence of On-chip Inductance},
author = {Abinash Roy and Masud H. Chowdhury},
year = {2007},
doi = {10.1109/ISCAS.2007.378048},
url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378048},
tags = {optimization},
researchr = {https://researchr.org/publication/RoyC07%3A0},
cites = {0},
citedby = {0},
pages = {885-888},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA},
publisher = {IEEE},
}