Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs

Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan. Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 249-254, IEEE, 2015. [doi]

Abstract

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