Sourav Roy, Nikhil Jain, Sandeep Jain, Robert Page. Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine. In 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015. pages 15-19, IEEE, 2015. [doi]
Abstract is missing.