Testing 3D stacked ICs for post-bond partial/complete stack

Surajit Kumar Roy, Dona Roy, Chandan Giri, Hafizur Rahman. Testing 3D stacked ICs for post-bond partial/complete stack. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 522-525, IEEE, 2012. [doi]

@inproceedings{RoyRGR12-0,
  title = {Testing 3D stacked ICs for post-bond partial/complete stack},
  author = {Surajit Kumar Roy and Dona Roy and Chandan Giri and Hafizur Rahman},
  year = {2012},
  doi = {10.1109/MWSCAS.2012.6292072},
  url = {https://doi.org/10.1109/MWSCAS.2012.6292072},
  researchr = {https://researchr.org/publication/RoyRGR12-0},
  cites = {0},
  citedby = {0},
  pages = {522-525},
  booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2526-4},
}