FPGA real time synthesis of simplified SIFT algorithm

Pablo Rubio-Ibáñez, J. Javier Martínez-Álvarez, Ginés Doménech-Asensi. FPGA real time synthesis of simplified SIFT algorithm. In Lukas Esterle, Andrea Prati 0001, Senem Velipasalar, Victor M. Brea, Caifeng Shan, editors, Proceedings of the 12th International Conference on Distributed Smart Cameras, ICDSC 2018, Eindhoven, The Netherlands, September 3-4, 2018. ACM, 2018. [doi]

Abstract

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