Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun. Analyzing and modeling process balance for sub-threshold circuit design. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 275-280, ACM, 2007. [doi]
@inproceedings{RyanWC07,
title = {Analyzing and modeling process balance for sub-threshold circuit design},
author = {Joseph F. Ryan and Jiajing Wang and Benton H. Calhoun},
year = {2007},
doi = {10.1145/1228784.1228853},
url = {http://doi.acm.org/10.1145/1228784.1228853},
tags = {modeling, design, process modeling},
researchr = {https://researchr.org/publication/RyanWC07},
cites = {0},
citedby = {0},
pages = {275-280},
booktitle = {Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007},
editor = {Hai Zhou and Enrico Macii and Zhiyuan Yan and Yehia Massoud},
publisher = {ACM},
isbn = {978-1-59593-605-9},
}