Pirouz Bazargan-Sabet, Laurent Vuillemin. An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators. In 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA. pages 168-173, IEEE Computer Society, 2001. [doi]
@inproceedings{SabetV01,
title = {An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators},
author = {Pirouz Bazargan-Sabet and Laurent Vuillemin},
year = {2001},
url = {http://csdl.computer.org/comp/proceedings/rsp/2001/1206/00/12060168abs.htm},
tags = {systematic-approach},
researchr = {https://researchr.org/publication/SabetV01},
cites = {0},
citedby = {0},
pages = {168-173},
booktitle = {12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-1206-2},
}