Design of high-performance QCA incrementer/decrementer circuit based on adder/subtractor methodology

Nuriddin Safoev, Jun-Cheol Jeon. Design of high-performance QCA incrementer/decrementer circuit based on adder/subtractor methodology. Microprocessors and Microsystems, 72, 2020. [doi]

@article{SafoevJ20,
  title = {Design of high-performance QCA incrementer/decrementer circuit based on adder/subtractor methodology},
  author = {Nuriddin Safoev and Jun-Cheol Jeon},
  year = {2020},
  doi = {10.1016/j.micpro.2019.102927},
  url = {https://doi.org/10.1016/j.micpro.2019.102927},
  researchr = {https://researchr.org/publication/SafoevJ20},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {72},
}