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Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes

Hans Sahm, Matthias Sauppe, Erik Markert, Thomas Horn, Ulrich Heinkel, Klaus-Holger Otto. Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes. Bell Labs Technical Journal, 18(3):195-209, 2013. [doi]

Authors

Hans Sahm

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Matthias Sauppe

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Erik Markert

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Thomas Horn

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Ulrich Heinkel

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Klaus-Holger Otto

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