Hans Sahm, Matthias Sauppe, Erik Markert, Thomas Horn, Ulrich Heinkel, Klaus-Holger Otto. Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes. Bell Labs Technical Journal, 18(3):195-209, 2013. [doi]
@article{SahmSMHHO13,
title = {Optimized ASIC/FPGA Design Flow for Energy Efficient Network Nodes},
author = {Hans Sahm and Matthias Sauppe and Erik Markert and Thomas Horn and Ulrich Heinkel and Klaus-Holger Otto},
year = {2013},
doi = {10.1002/bltj.21634},
url = {http://dx.doi.org/10.1002/bltj.21634},
researchr = {https://researchr.org/publication/SahmSMHHO13},
cites = {0},
citedby = {0},
journal = {Bell Labs Technical Journal},
volume = {18},
number = {3},
pages = {195-209},
}