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Parallel Verification in RISC-V Secure Boot

Akihiro Saiki, Yu Omori, Keiji Kimura. Parallel Verification in RISC-V Secure Boot. In 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023. pages 568-575, IEEE, 2023. [doi]

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