An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects - researchr publication

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Sandeep Saini, Mahesh Kumar Adimulam, Sreehari Veeramachaneni, M. B. Srinivas. An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 411-416, IEEE, 2010. [doi]

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