Mitsuko Saito, Noriyuki Miura, Tadahiro Kuroda. A 2Gb/s 1.8pJ/b/chip inductive-coupling through-chip bus for 128-Die NAND-Flash memory stacking. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 440-441, IEEE, 2010. [doi]
Abstract is missing.