Design exploration for network on chip based FPGAs: 2D and 3D tiles to router interface

Alaa Salaheldin, Hassan Mostafa, Ahmed M. Soliman. Design exploration for network on chip based FPGAs: 2D and 3D tiles to router interface. Microelectronics Journal, 88:47-55, 2019. [doi]

@article{SalaheldinMS19,
  title = {Design exploration for network on chip based FPGAs: 2D and 3D tiles to router interface},
  author = {Alaa Salaheldin and Hassan Mostafa and Ahmed M. Soliman},
  year = {2019},
  doi = {10.1016/j.mejo.2019.04.005},
  url = {https://doi.org/10.1016/j.mejo.2019.04.005},
  researchr = {https://researchr.org/publication/SalaheldinMS19},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {88},
  pages = {47-55},
}