Using Hardware Transactional Memory to Enable Speculative Trace Optimization

Juan Salamanca, José Nelson Amaral, Guido Araujo. Using Hardware Transactional Memory to Enable Speculative Trace Optimization. In 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PAD Workshops, Florianópolis, Brazil, October 18-21, 2015. pages 1-6, IEEE, 2015. [doi]

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