A 1.8V 8-Bit 500 MSPS Segmented Current Steering DAC with >66 dB SFDR

Smrutilekha Samanta, Santanu Sarkar. A 1.8V 8-Bit 500 MSPS Segmented Current Steering DAC with >66 dB SFDR. In 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020. pages 13-17, IEEE, 2020. [doi]

@inproceedings{SamantaS20,
  title = {A 1.8V 8-Bit 500 MSPS Segmented Current Steering DAC with >66 dB SFDR},
  author = {Smrutilekha Samanta and Santanu Sarkar},
  year = {2020},
  doi = {10.1109/ISVLSI49217.2020.00013},
  url = {https://doi.org/10.1109/ISVLSI49217.2020.00013},
  researchr = {https://researchr.org/publication/SamantaS20},
  cites = {0},
  citedby = {0},
  pages = {13-17},
  booktitle = {2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-5775-7},
}