Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA

G. S. Sangeetha, Vignesh Radhakrishnan, Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar. Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA. In Bijoy Antony Jose, Jimson Mathew, editors, 8th International Symposium on Embedded Computing and System Design, ISED 2018, Cochin, India, December 13-15, 2018. pages 129-134, IEEE, 2018. [doi]

Authors

G. S. Sangeetha

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Vignesh Radhakrishnan

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Prabhu B. M. Prasad

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Khyamling Parane

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Basavaraj Talawar

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