Ocan Sankur, Benoît Boyer, Florian Faissole. Verification of Generic VHDL Designs and Their Translation to Rocq. In Yu-Fang Chen 0001, Thomas P. Jensen, Ondrej Lengál, editors, Verification, Model Checking, and Abstract Interpretation - 27th International Conference, VMCAI 2026, Rennes, France, January 12-13, 2026, Proceedings. Volume 16417 of Lecture Notes in Computer Science, pages 287-308, Springer, 2026. [doi]
Abstract is missing.