Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs

Masaki Sano, Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Tongxin Yang, Tomoaki Ukezono. Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs. In 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021. pages 55-56, IEEE, 2021. [doi]

@inproceedings{SanoSNKTYU21,
  title = {Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs},
  author = {Masaki Sano and Kenta Shirane and Hiroki Nishikawa and Xiangbo Kong and Hiroyuki Tomiyama and Tongxin Yang and Tomoaki Ukezono},
  year = {2021},
  doi = {10.1109/ISOCC53507.2021.9613872},
  url = {https://doi.org/10.1109/ISOCC53507.2021.9613872},
  researchr = {https://researchr.org/publication/SanoSNKTYU21},
  cites = {0},
  citedby = {0},
  pages = {55-56},
  booktitle = {18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-0174-6},
}