Optimized VHDL-based Karatsuba polynomial multiplier generator for GF(2n) - researchr publication authors

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Muhammad Husni Santriaji, Arif Sasongko. Optimized VHDL-based Karatsuba polynomial multiplier generator for GF(2n). In 2015 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2015, Nusa Dua Bali, Indonesia, November 9-12, 2015. pages 274-278, IEEE, 2015. [doi]

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