Muhammad Husni Santriaji, Arif Sasongko. Optimized VHDL-based Karatsuba polynomial multiplier generator for GF(2n). In 2015 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2015, Nusa Dua Bali, Indonesia, November 9-12, 2015. pages 274-278, IEEE, 2015. [doi]
@inproceedings{SantriajiS15,
title = {Optimized VHDL-based Karatsuba polynomial multiplier generator for GF(2n)},
author = {Muhammad Husni Santriaji and Arif Sasongko},
year = {2015},
doi = {10.1109/ISPACS.2015.7432779},
url = {http://dx.doi.org/10.1109/ISPACS.2015.7432779},
researchr = {https://researchr.org/publication/SantriajiS15},
cites = {0},
citedby = {0},
pages = {274-278},
booktitle = {2015 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2015, Nusa Dua Bali, Indonesia, November 9-12, 2015},
publisher = {IEEE},
isbn = {978-1-4673-6499-7},
}