Efficient VLSI architecture for bit plane encoder of JPEG 2000

Kishor Sarawadekar, Swapna Banerjee. Efficient VLSI architecture for bit plane encoder of JPEG 2000. In Proceedings of the International Conference on Image Processing, ICIP 2009, 7-10 November 2009, Cairo, Egypt. pages 2805-2808, IEEE, 2009. [doi]

Abstract

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