An Efficient Hardware Design for Combined AES and AEGIS

Amit Sardar, Bijoy Das, Dipanwita Roy Chowdhury. An Efficient Hardware Design for Combined AES and AEGIS. In Eighth International Conference on Emerging Security Technologies, EST 2019, Colchester, UK, July 22-24, 2019. pages 1-6, IEEE, 2019. [doi]

Abstract

Abstract is missing.