Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

S. Sasikumar, B. Maheshwar Reddy, V. R. Prakash, M. Malleshwar Reddy. Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX. In 14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023, Delhi, India, July 6-8, 2023. pages 1-8, IEEE, 2023. [doi]

This author has not been identified. Look up 'S. Sasikumar' in GoogleThis author has not been identified. Look up 'B. Maheshwar Reddy' in GoogleThis author has not been identified. Look up 'V. R. Prakash' in GoogleThis author has not been identified. Look up 'M. Malleshwar Reddy' in Google

runs on WebDSL