Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX

S. Sasikumar, B. Maheshwar Reddy, V. R. Prakash, M. Malleshwar Reddy. Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX. In 14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023, Delhi, India, July 6-8, 2023. pages 1-8, IEEE, 2023. [doi]

@inproceedings{SasikumarRPR23,
  title = {Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX},
  author = {S. Sasikumar and B. Maheshwar Reddy and V. R. Prakash and M. Malleshwar Reddy},
  year = {2023},
  doi = {10.1109/ICCCNT56998.2023.10307536},
  url = {https://doi.org/10.1109/ICCCNT56998.2023.10307536},
  researchr = {https://researchr.org/publication/SasikumarRPR23},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023, Delhi, India, July 6-8, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-3509-5},
}