Activity profile driven simultaneous vt assignment and power switch sizing for leakage power minimization in nanometer CMOS designs

Ashoka Visweswara Sathanur, Jos Huisken, Jan Stuyt, Harmke de Groot. Activity profile driven simultaneous vt assignment and power switch sizing for leakage power minimization in nanometer CMOS designs. In 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece, 12-15 December, 2010. pages 519-522, IEEE, 2010. [doi]

Abstract

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