A hierarchical approach to transistor-level power estimation of arithmetic units

Janardhan H. Satyanarayana, Keshab K. Parhi. A hierarchical approach to transistor-level power estimation of arithmetic units. In 1996 IEEE International Conference on Acoustics, Speech, and Signal Processing Conference Proceedings, ICASSP '96, Atlanta, Georgia, USA, May 7-10, 1996. pages 3338-3341, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.