A Framework for Static Analysis of VHDL Code

Marc Schlickling, Markus Pister. A Framework for Static Analysis of VHDL Code. In Christine Rochange, editor, 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, Pisa, Italy, July 3, 2007. Volume 07002 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany, 2007. [doi]

@inproceedings{SchlicklingP07,
  title = {A Framework for Static Analysis of VHDL Code},
  author = {Marc Schlickling and Markus Pister},
  year = {2007},
  url = {http://drops.dagstuhl.de/opus/volltexte/2007/1189},
  tags = {analysis, static analysis},
  researchr = {https://researchr.org/publication/SchlicklingP07},
  cites = {0},
  citedby = {0},
  booktitle = {7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, Pisa, Italy, July 3, 2007},
  editor = {Christine Rochange},
  volume = {07002},
  series = {Dagstuhl Seminar Proceedings},
  publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
}